🔨 Projects

RISC-V
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Design and Tape-out a RISC-V CPU

Zecheng Liang, Zhe Sun, Yihua Lu, Ren Wei, Yuan Tan, Xun Li, Lingzhuang Zhang, Yang Yu

  • Handled an instruction decoder as part of a project seeking to design and tape-out a RISC-V CPU.
  • Gained an understanding of how the CPU works and heightened interest in RISC-V and system research.
Mirror
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Optimize and Maintain Open Source Mirror Site of Lanzhou University

Yuan Tan

  • Took primary responsibility for maintaining the mirror, the most utilized repository in the northwest of China.
  • Facilitated traffic defense against malicious attackers who excessively downloaded files, abusing the service.